FIGS. 7(a) and 7(b) show schematic cross sectional views respectively showing configurations and operation of a liquid crystal display device.
As shown in FIG. 7(a), the liquid crystal display device has an arrangement in which on one side of a glass substrate 1001 is formed an electrode 1002, on one side of a glass substrate 1011 is formed an electrode 1012, and further, on the electrodes 1002 and 1012 are respectively printed alignment materials on which alignment films 1003 and 1013 are respectively formed. After the formation of the alignment films 1003 and 1013, rubbing is applied to the alignment film 1003 in a direction parallel to a paper surface and the alignment film 1013 in a direction perpendicular to the paper surface. Further, a sandwich structure is formed by the two glass substrates 1001 and 1011 so that they sandwich the electrodes 1002 and 1012 in between. A TN (Twisted Nematic) liquid crystal material is filled between the glass substrates 1001 and 1011, thereby forming a liquid crystal layer 1021. Here, in the liquid crystal layer 1021, a liquid crystal molecule 1022 has a long axis, a direction of which is aligned with a rubbing direction in the vicinity of respective surfaces of the glass substrates 1001 and 1011, and the TN liquid crystal material is filled so that a long-axis direction is rotated by about 90° between the substrates. In addition, to outer surfaces of the glass substrates 1001 and 1011 are affixed polarizing plates 1004 and 1014 so that transmission axes thereof intersect each other.
Here, the liquid crystal display device as shown in FIG. 7(a) shows a state in which the liquid crystal layer 1021 is free from an application of a voltage (a state in which a driving voltage is OFF). For example, when light is incident from below the liquid crystal display device, only a polarizing component of the light which is parallel to a paper surface is transmitted through the polarizing plate 1004, then, a polarizing direction of the light is rotated by about 90° in the liquid crystal layer 1021, thereafter being emitted from the polarizing plate 1014, as the light having a polarization axis perpendicular to the paper surface. Thus, in the liquid crystal display device as shown in FIG. 7(a), bright display is attained by the transmission of light.
Meanwhile, supplying a voltage to the electrodes 1002 and 1012 so as to apply the voltage across the liquid crystal layer 1021 causes, as shown in FIG. 7(b), the liquid crystal molecules 1022 to rotate so that long axes are aligned in a direction of an electric field. Here, light which is incident from the polarizing plate 1004 and has a polarizing component perpendicular to a paper surface has a polarization axis which does not rotate in the liquid crystal layer 1021. Therefore, even when incident onto the polarizing plate 1014 having a polarization axis in a direction perpendicular to the paper surface, the light cannot be transmitted through the polarizing plate 1014, thereby attaining dark display in the liquid crystal display device shown in FIG. 7(b).
FIG. 8 is a plan view showing a schematic configuration of a simple matrix liquid crystal display device adopting the principles of configuration of FIG. 7.
The simple matrix liquid crystal display device has two glass substrates sandwiching a liquid crystal layer, on each of which are formed scanning lines 1031-1 to 1031-n, and signal lines 1041-1 to 1041-m. The scanning lines 1031-1 to 1031-n and the signal lines 1041-1 to 1041-m are formed as extra-fine transparent lines in stripes intersecting each other. In addition, the scanning lines 1031-1 to 1031-n and the signal lines 1041-1 to 1041-m are respectively driven by a scanning electrode driving IC and a signal electrode driving IC. By controlling a voltage to be applied to pixels each of which is formed on a point of intersection of the lines, it is possible to control a state of alignment of liquid crystal molecules per pixel in the liquid crystal layer, thereby performing display.
Drawbacks to the simple matrix liquid crystal display device are as follows: (i) reduction in contrast of pixels on display, which is caused by an increase in the number of scanning lines, which causes an effective voltage to be applied to a liquid crystal at each point of intersection of the scanning lines to gradually decrease toward a tip, that is not suitable for a high-definition liquid crystal display device; and (ii) low response speed.
The problem of the simple matrix liquid crystal display device is solved in, for example, an active-matrix liquid crystal display device having a switching element in each pixel. FIG. 9 shows the configuration of a common conventional active-matrix liquid crystal display device. Further, FIGS. 10(a) and 10(b) show pixel arrangements in the active-matrix (reverse-staggered) liquid crystal display device.
The active-matrix liquid crystal display device as shown in FIG. 9 is an example in which a TFT (Thin Film Transistor) 1051 is adopted as a switching element. The active-matrix liquid crystal display device has two glass substrates sandwiching a liquid crystal layer, one of which has scanning lines 1061-1 to 1061-n and signal lines 1071-1 to 1071-m disposed thereon in a lattice state, where a pixel 1052 is connected, via the TFT 1051 being the switching element of a pixel, at a point of intersection of scanning and signal electrodes to be connected to the scanning lines 1061-1 to 1061-n and the signal lines 1071-1 to 1071-m, respectively. Further, the scanning lines 1061-1 to 1061-n and the signal lines 1071-1 to 1071-m are respectively connected with a scanning electrode driving IC 1062 and a signal electrode driving IC 1072.
The active-matrix liquid crystal display device has an pixel arrangement, as shown in FIGS. 10(a) and 10(b), in which a TFT board 1081 having TFTs 1051, scanning lines 1061 and signal lines 1071 provided thereon, and a CF board 1091 having a counter electrode 1092 provided thereon are disposed with an interval, and a liquid crystal layer 1101 is sealed between a pixel electrode 1082 on the side of the TFT board 1081 and a counter electrode 1092 on the side of the CF board 1091.
On the TFT board 1081, on one side of the glass substrate 1083 is formed a polarizing plate 1084, and on the other side of the glass substrate 1083 are formed the scanning lines 1061 including the scanning electrode (gate electrode) 1063, an insulating film layer 1085, a semiconductor 1086, the signal lines 1071 and a pixel electrode 1082, and an alignment film 1087 successively.
On the other hand, on the CF board 1091, on one side of the glass substrate 1093 is formed a polarizing plate 1094, and on the other side of the glass substrate 1093 are formed a color filter layer 1095 in which color plates R/G/B/Bk are stacked, a counter electrode 1092, and an alignment film 1096 successively.
Next, the following will explain operation of the active-matrix liquid crystal display device with reference to FIG. 9.
First, when an ON voltage is outputted with respect to the scanning line at a first line 1061-1 from the scanning electrode driving IC 1062 (here, an OFF voltage is outputted to the other scanning lines), all the TFTs 1051 become ON, the TFTs 1051 being respectively connected to the scanning electrodes at a first line 1063 via the scanning lines 1061-1. Then, a data signal corresponding to a scanning line at a first line is offered from the signal electrode driving IC 1072 to each of the signal lines 1071. Here, since a circuit from a signal electrode of each of the signal lines 1071 to the pixel electrode 1082 via the TFTs 1051 is in a conducting state, a signal voltage (data signal) is applied to all pixel electrodes 1082 connected to the scanning line at the first line 1061-1, and data is written into pixels 1052 corresponding to the pixel electrodes 1082. Thereafter, the output of the scanning electrode driving IC 1062 with respect to the scanning line at the first line 1061-1 becomes an OFF voltage. This causes the TFTs 1051 connected to the scanning line 1061-1 to become OFF, thereby ceasing conduction between the signal electrode and the pixel electrodes 1082 of each of the signal lines 1071, and terminating writing with respect to the pixels 1052.
When a scanning output to the scanning line at the first line 1061-1 becomes an OFF voltage, an ON voltage is concurrently outputted continuously from the scanning electrode driving IC 1062 to a scanning line at a second line 1061-2. The repetition of this operation until the last line terminates driving for one screen.
In the case of the common driving of the active-matrix liquid crystal display device as above, resistance and parasitic capacitance of the scanning electrode 1063 affect a scanning voltage waveform as shown in FIG. 11 to change from a rectangular waveform indicated by the solid line on the side of an input end (the side closer to the scanning electrode driving IC) of each of the scanning lines 1061 into a dull waveform indicated by the broken line, as it approaches to a termination end.
Such a change of the scanning voltage waveform into a dull waveform raises a problem such that it causes deviation in the ON/OFF timing of the TFT 1051 at the both input and termination ends of the scanning lines, and an application of a signal voltage at the following stage earlier than the switch of the TFT 1051 to an OFF state at the termination end causes a signal of the following stage to be written into a pixel, thereby occurring erroneous writing.
Against this problem, conventionally adopted is a method for reducing wiring resistance by enlarging the width of a line, increasing the film thickness of a line, changing the material of a line into a low-specific-resistivity wiring material, and the like. However, this method has a problem such that enlarging the width of a line increases the ratio of the area of a wiring portion within a pixel, thereby reducing the number of apertures through which light is transmitted.
Further, another method is to prevent erroneous writing by causing the ON timing of a signal voltage to deviate from the ON timing of a scanning voltage and thereby obtain sufficient offset time so as to prevent variation in a writing signal even when the OFF timing of the scanning voltage is delayed.
With this method, as in the case of a signal voltage waveform shown in FIG. 11, for example, with respect to the scanning line at a line k, offset time is set between the ON timing of a scanning voltage and the ON timing of a signal voltage. Therefore, even when a deviation occurs in a period of time from a switch of a scanning voltage with respect to the line k to an OFF state to a change in the TFT 1051 which is connected to the termination end of the line k into a state of non-conduction, the offset time thus set before a line (k+1) at the following stage starts writing prevents writing of line data (k+1) with respect to a pixel 1052 pertaining to the line k, thereby preventing erroneous writing.
Furthermore, a method for realizing easy writing by inputting a scanning driving voltage to each scanning line through both ends has already gone into the actual use. This prior art, as shown in FIG. 12, drives scanning lines 1111 by connecting thereto the output of two scanning electrode driving ICs 1112 and 1113 from the both left and right sides, thereby suppressing emergence of a dull scanning voltage waveform at the termination end of a scanning line, which was generated during one-side driving.
However, when using the two scanning electrode driving ICs 1112 and 1113 to drive a single scanning line as above, what is concerned is that a deviation in output between the scanning electrode driving ICs 1112 and 1113 causes inconsistencies in input voltages on the left and right, which generates a through current between the ICs.
A technique to solve the problem of the foregoing prior art is disclosed in Japanese Unexamined Patent Publication No. 213623/1989 (Tokukaihei 1-213623 published on Aug. 28, 1989).
According to the technique as disclosed in the publication 1-213623, as shown in FIG. 13, it is arranged that the output of the scanning electrode driving IC 1122 is divided into two, and one of which is directly connected to one end of each of the scanning lines 1121 and the other, as a line, to the other end of each of the scanning lines 1121 first via upper and lower ends of a display panel 1131 then via a connection board 1132. Accordingly, the single output of the single IC is applied to each of the scanning lines 1121 through the both ends, thereby solving the problem resulted from a deviation in output between the scanning electrode driving ICs.
Meanwhile, a liquid crystal display device as disclosed in Japanese Unexamined Patent Publication No. 253940/1998 (Tokukaihei 10-253940 published on Sep. 25, 1998) includes, as shown in FIG. 14, a discharging switching elements 1142 provided at the termination end of each of scanning lines 1141. As to each of the discharging switching elements 1142, a gate electrode thereof is connected with the scanning line 1141 of the following stage, and a source/drain electrode thereof is connected with the scanning line 1141 of the same stage and a scanning driving voltage power source 1151 which supplies a scanning driving voltage of a non-selected period (hereinafter referred to as “non-selected state scanning driving voltage power source”).
In the liquid crystal display device of the foregoing arrangement, when each of the scanning lines 1141 are switched from a selected state to a non-selected state, an ON signal from the scanning line 1141 of the following state that is newly switched to a selected state is applied to the discharging switching element 1142. Accordingly, when the discharging switching element 1142 is turned ON, with respect to the non-selected scanning line 1141, a non-selected state scanning driving voltage is applied from the termination end thereof, thereby suppressing the dull fall of a scanning driving voltage waveform when the scanning line 1141 is non-selected.
However, the above conventional arrangements have the following problems.
First, as shown in FIG. 11, a method for staggering the respective ON timings of a scanning voltage and a signal voltage has a problem as follows: since offset is allowed in a signal voltage input, actual time for writing (effective writing time) is more reduced than scanning time per line. Therefore, the writing of a TFT 1051 at the termination end is terminated in an OFF state, i.e., the TFT 1051 fails to be charged to a writing voltage within the writing time and stays low in charge when the writing thereof is terminated. Further, a display device which has high resolution and short writing time has a problem such that erroneous writing and deficient writing cannot simultaneously be prevented due to the lack of sufficient offset time, thereby impairing display quality.
Further, in the method of FIG. 12, twice the number of the scanning electrode diving ICs are required compared to the case of performing one-side driving. Further, in the method according to the publication 1-213623, the number of scanning lines and connection boards for the routing of a scanning signal increase. Therefore, in either case, there arises a problem of increase in costs due to increase in the number of components and in work hours for assembly.
Further, in the liquid crystal display device disclosed in the publication 10-253940, erroneous writing can be prevented by suppressing the dull fall of the scanning driving voltage waveform. However, since suppressing a dull rise is not taken into consideration, the rise of the switching element of a pixel delays when turned ON. Accordingly, effective writing time is reduced, thereby being unable to prevent the shortage of charges in a display pixel.
Further, in the liquid crystal display device disclosed in the publication 10-253940, a gate electrode itself of the discharging switching element is connected to the termination end of the scanning line of the following stage. This delays the rise of the gate electrode of the switching element and prevents the prompt action of a voltage applied from the non-selected state scanning driving voltage power source. Thus, a sufficient improvement cannot be expected.
Note that, the foregoing problems are not unique to a liquid crystal display device and may also emerge in other active-matrix image display devices adopting a TFT as a switching element such as an EL display device and the like.